Field of the Invention
The present invention relates to a wafer processing method for processing a wafer as measuring the positional relation between a preset processing position and an actually processed position by laser processing of the wafer.
Description of the Related Art
In a semiconductor device fabrication process, a plurality of electronic circuits such as integrated circuits (ICs) and large-scale integrations (LSIs) are formed on the front side of a substantially disk-shaped workpiece such as a semiconductor wafer. The back side of the workpiece thus having the plural electronic circuits is ground to reduce the thickness of the workpiece to a predetermined thickness. Thereafter, a device area of the workpiece where the electronic circuits are formed is cut along division lines called streets by applying a laser beam to thereby divide the workpiece into a plurality of device chips (see Japanese Patent Laid-Open No. 2012-151225, for example).